Ion implantation systems are used to impart impurities, known as dopant elements, into workpieces such as semiconductor substrates or wafers. In a typical ion implantation system, an ion source ionizes a desired dopant element, and the ionized impurity is extracted from the ion source as a beam of ions. The ion beam is directed (e.g., swept or scanned) across respective workpieces to implant ionized dopants within the workpieces. The dopant ions thus alter the composition of the workpieces, causing them to possess desired electrical characteristics, such a may be useful for fashioning particular semiconductor devices, such as transistors, upon the substrates.
The continuing trend toward smaller electronic devices has driven the need to form a greater number of smaller, more powerful, and more energy efficient semiconductor devices onto individual workpieces. Thus, careful control over semiconductor fabrication processes such as ion implantation, and more particularly, the uniformity of ions implanted into the workpieces, is necessitated. Moreover, semiconductor devices are being fabricated upon larger workpieces to increase product yield. For example, wafers having a diameter of 300 mm or more are being utilized so that more devices can be produced on a single wafer. Such wafers are expensive and as such, it is highly desirable to mitigate waste, such as having to scrap an entire wafer due to non-uniform ion implantation. However, larger wafers and high density features can make uniform ion implantation challenging, since the ion beam is scanned across greater angles and distances in order to reach the perimeters of the wafers, yet not miss implanting any region therebetween.
In addition, the high voltage typically necessary to supply the ion source is subject to occasional arcing between various extraction and suppression electrodes and other components associated therewith. This tendency for arcing often fully discharges one or more affected high voltage power supplies until the arc naturally self-extinguishes at a much lower supply voltage. While arcing, the beam current may become erratic or interrupted until the supply voltage is restored, during which time ion implantation may experience intermittent ion implantation. Such an arcing and subsequent intermittent ion implantation is commonly referred to as a “glitch”. During serial wafer processing, when a glitch along a path of the ion beam is detected, conventionally, the region or portion of the beam path that failed to be implanted during the glitch is specifically “repaired” by various techniques of re-tracing the path with ion beam in order to “fill in” the non-implanted region. Such repairs are time consuming and sometimes lead to further undesirable effects caused by the starting and stopping of the ion beam in the glitch region, especially when very short glitches occur. Accordingly, there is a need for a dynamic determination of the appropriate action to be taken when a glitch or non-uniformity in the ion beam is detected.